6. Logical to Physical Address Mapping

Every process thinks it owns memory starting at 0x0000; the OS + hardware secretly map this to real physical RAM. Three techniques, in historical order:

1. Base & Limit Registers (simplest) — a base register (start address) and limit register (size) per process. Problem: process must be contiguous in RAM → external fragmentation, and a process can't exceed available contiguous RAM.

2. Segmentation — split a process into logical segments (code, data, stack, heap), each with its own base+limit in a segment table. Physical = Logical + Base (fault if offset > limit). Still suffers external fragmentation since segments are variable-sized.

3. Paging (modern standard) — fixed-size chunks: physical RAM → frames (e.g., 4KB), logical memory → pages (same size). A page table maps pages to frames. Pages need not be contiguous in RAM — no external fragmentation.

Internal Frag. External Frag. Contiguous Needed?
Paging	Yes (last page)	No	No
Segmentation	No	Yes	Within segment
Segmentation + Paging (x86)	Minimal	No	No

Multi-level paging: x86-64 uses 4-level paging (PGD → PUD → PMD → PTE) — only allocates page-table entries actually needed, saving memory versus one giant flat table.

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